(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically a method used to reduce a reverse narrow channel effect, (RNCE), encountered in narrow channel width, metal oxide semiconductor field effect transistors, (MOSFET).
(2) Description of the Prior Art
Micro-miniaturization, or the ability to create semiconductor devices, using sub-micron features, have allowed the semiconductor industry to improve the performance of MOSFET devices. The reduction in feature dimensions, result in a significant decrease in performance degrading capacitance and resistance values, allowing the higher performing MOSFET devices to be realized. However as the channel length, and channel width, of MOSFET devices are decreased, unwanted phenomena, such as a reverse narrow channel effect, (RCNE), have to be addressed. The RCNE phenomena entails a depletion of dopant, such as boron for an N channel, MOSFET device, in the channel region, resulting in unwanted, lower than designed, threshold voltages. The depletion of boron in the channel region, results from boron moving away from the channel region, piling up at the lightly doped source/drain, (LDD), --channel interface, or piling up at the isolation --channel interface. It is believed that the defects generated at these interfaces, creating a region of interstitial silicon, as a result of implantation damage at the LDD interface, or as a result of reactive ion etching, (RIE), used to create a shallow trench isolation shape, enhance the movement of boron, from the channel region, to these interfaces. In addition, as the width of the channel region decreases, the effect of boron depletion becomes more pronounced, and thus the RCNE phenomena becomes a critical deterrent to yield and performance for MOSFET devices, designed with narrow channel widths.
This invention will describe a method in which the RCNE phenomena is reduced by restricting the pile up of boron, at the shallow trench isolation region --channel interface. This is accomplished via use of a large angle, nitrogen ion implantation procedure, applied to a shallow trench shape, prior to filling with insulator. The implanted nitrogen region, at the sides of the shallow trench shape, reduce the movement of boron to the defective sides of the shallow trench shape, resulting in an increased level of boron, in the channel region, compared to counterparts fabricating without the use of the nitrogen ion implantation procedure, thus resulting in a reduction of the RCNE phenomena. Prior art, such as Ono et al, in the article, "TED Control Technology for Suppression of Reverse Narrow Channel Effect in 0.1 um MOS Devices", appearing in IEDM 97, pages 227-230, describe a blanket nitrogen, ion implantation procedure, performed after a shallow trench has been filled. However that prior art would not place the desired nitrogen ion implanted region, at the sides of the shallow trench, or at the shallow trench --channel region interface. This invention, using a novel, large angle, nitrogen ion implantation procedure, prior to filling of the shallow trench, creates the blocking nitrogen rich, silicon layer, at the preferred location, the sides of the shallow trench.